Prof Partha P Chakrabarti’s areas of interest include Artificial Intelligence (AI), Formal Methods, CAD for VLSI & Embedded Systems, Fault Tolerance, Algorithm Design and Digital Repositories.
His main focus is in the area of Artificial Intelligence Algorithms and Development of Automated Reasoning Frameworks that combine search, optimization, deduction, learning and decision making, especially under time and memory constraints. He is interested in applications of the above methods to design, analysis, synthesis, scheduling and verification of complex fault tolerant embedded real-time systems including digital, mixed signal, automotive, microfluidics, etc.
He is also interested in design of large complex digital repositories and leads national efforts related to the National Digital Library of India, the Digital Earth Initiative, Science and Heritage (SANDHI), Signals & Systems in Life Science, etc., which enable the use of search, reasoning and data analytics to problems of societal use.
He is also keen in developing teaching innovations and academic networks. He leads the national effort on GIAN and has been a key contributor to NPTEL, T10KT, Pedagogy, etc.
Heuristic search through islands by Chakrabarti, P.P., Ghose, S., DeSarkar, S.C Artificial. Intelligence 29 339 - 347 (1986)
Heuristic search in restricted memory by Chakrabarti, P.P., Ghose, S., Acharya A. and DeSarkar, S.C Artificial Intelligence 41 197 - 221 (1989)
Algorithms for searching explicit AND/OR graphs and their applications to problem reduction search by Chakrabarti, P.P. Artificial Intelligence 65 329 - 345 (1994)
Searching Game Trees under a Partial order by Dasgupta, P., Chakrabarti, P.P., De Sarkar, S.C. Artificial Intelligence 82 237 - 257 (1996)
Partial Precedence Constrained Scheduling by Chakrabarti, P.P. IEEE Transactions on Computers 48 (10) 1127 - 1130 (1999)
A synthesis system for analog circuits based on evolutionary search and topological reuse by T. R. Dastidar, P. P. Chakrabarti, P. Ray IEEE Transactions on Evolutionary Computation 9(2) 211-224 (2005)
Design Intent Coverage A New Paradigm for Formal Property Verification by Basu, P., Das, S., Banerjee, A., Dasgupta, P., Chakrabarti, P.P., Mohan, C.R., Fix L., Armoni, R., IEEE Transactions on Computer Aided Design of Integrated Circuits & Systems 25 (10) 1922 Â? 1934 (2006)
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures by Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta Journal of Artificial Intelligence Research 44 275-333 (2012)
Robustness Analysis of Embedded Control Systems with respect to Signal Perturbations: Finding Minimal Counterexamples using Fault Injection by S. G. Vadlamudi, P. P. Chakrabarti IEEE Transactions on Dependable and Secure Computing (TDSC) 48-58 (2014)
Layout-Aware Mixture Preparation of Biochemical Fluids on Application-Specific Digital Microfluidic Biochips by Sudip Roy, Partha Pratim Chakrabarti, Srijan Kumar, Krishnendu Chakrabarty, Bhargab B. Bhattacharya ACM Trans. Design Autom. Electr. Syst., 20(3) 45 pages (2015)
A deep validation study of Indian Language system based on patterns of a) comparative Philology, Phonology & Phonetics & b) Psycho-Physics of Varnamala MHRD
AI driven real time traffic incident prediction and traffic management MHRD
Artificial intelligence for societal needs: knowledge discovery and intelligent decision making for solving problems in Indian context related to energy, climate, water, disaster management and traffic IIT KHARAGPUR
Centre of excellence for training and research in Microfluidics IIT KHARAGPUR
Centre of Excellence in robotics SRIC, IIT KHARAGPUR
Development of national digital library (NDL) of India - towards building a national asset National Mission on Education through Communication & Information Technology (NMEICT)
FMSAFE: A Networked Centre for Formal Methods in Validation and Certification Procededures for Safety - Critical ICT Systems Ministry of Human Resource Development, Department of Higher Education, Government of India
FMSAFE: A Networked Centre for Formal Methods in Validation and Certification Procededures for Safety - Critical ICT Systems at IIT Kharagpur Ministry of Human Resource Development, Department of Higher Education, Government of India
Formal Methods for Verification of Power Management in Mixed Signal Designs INTEL CORPORATION, USA.
GENERAL MOTORS ECS CRL FOR EDUCATION General Motors Technical Centre India Pvt. Ltd.
INSTITUTIONAL DEVELOPMENT PROJECT (IDF) SRIC, IIT KHARAGPUR
Intel embedded innovation lablet Intel Semiconductor (US) Limited
J C Bose Fellowship Science and Engineering Research Board (SERB)
Opened & Intelligent Plug-in Hybrid Electric Vehicle (PHEV) Technologies for Smart Indian Cities Tata Motors Limited
Research on AGV SRIC, IIT KHARAGPUR
SANDHI, Science -Technology & Culture - Heritage Interface by IIT Kharagpur MHRD
SYNOPSYS CAD LABORATORY PROJECTS Synopsys (India) Pvt.Ltd.
To develop a scientific rationale of IELS (Indo-European Langauge Systems) applying a) Computational Linguistics & b) Cognitive Geo-spatial mapping approaches MHRD
Urban - design, planning & urban engineering exploration of Varanasi MHRD
User emotion classification from keyboard keystroke SRIC, IIT KHARAGPUR
Area of Research: Internet and Media Law
Area of Research: Validation of Embedded Real Time Control
Area of Research: Artificial Intelligence